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Jacob Abraham
holds the Cockrell
Family Regents Chair in Engineering at The University of Texas at Austin. He is also director
of the Computer Engineering Research Center. He received the bachelor's degree
in electrical engineering from the University of Kerala, India, in
1970. His M.S. degree, in electrical engineering, and Ph.D., in
electrical engineering and computer science, were received from
Stanford University, Stanford, California, in 1971 and 1974,
respectively. He received the 2005 IEEE Emanuel R. Piore Award and is on the ISI list of the most cited researchers in the world.
Venkatesh Acharya received his B.E degree in Electrical Engineering from National Institute of Technology, Surathkal, Karnataka, India in 2002. He finished his M.Tech in Electrical Engineering from Indian Institute of Technology Madras in 2004. He is currently a Doctoral student in the EE department at The University of Texas at Dallas. He has worked with Sanyo LSI Pvt Limited, Bangalore prior to joining for doctoral studies. During his doctoral studies he has interned at Silicon Laboratories and Texas Instruments. His research interests include high speed data converters, high precision low frequency circuits and radio frequency integrated circuits.
Hesam Amir-Aslanzadeh received the B.S. and M.S. degrees in Electronics Engineering from Sharif University of Technology, Tehran, Iran in 2001 and 2003 respectively. He is currently working toward the Ph.D. degree at the Analog and Mixed Signal Center (AMSC), Texas A&M University. His current research interests include RF circuit design for low-power wireless systems and linear reconfigurable continuous-time filters.
Adnan Aziz received the PhD in EECS from Berkeley in 1996; his undergraduate degree is from IIT Kanpur. He joined UT in Spring 1996. Dr. Aziz's research interests lie in the design and verification of digital ICs, with an emphasis on communications applications. He has received the Fujitsu Research Award, an NSF CAREER Award, an IBM Research Fellowship, and the Synopsys Research Award.
Yongchan Ban received B.S. & M.S. in electrical engineering from Inha Univ., Incheon, Korea in 1997 and in 1999 respectively. He is currently a Ph.D student of ECE dept at the Univ. of Texas Austin. Prior to joining the UT in 2007, he has been a senior engineer at Samsung Electronics in the Semiconductor R&D Center on VLSI CAD development. His current research interests are Lithography Driven VLSI Design Automation and Design for Manufacturability (DFM).
Paul Bassett is currently the circuit design manager for Qualcomm's DSP core design group located in Austin. He has over 20 years experience in processor circuit design working for a wide range of companies: BBN, Kendall Square Research, Ross Technologies, Alchemy Semiconductor, AMD and Qualcomm. He has degrees from Texas A&M and MIT.
Stephen Bijansky received a BS in EE from the University of Delaware and a MS in ECE from Carnegie Mellon University. He is currently a Ph.D. student in the ECE department at UT. In the past, he had internships at Magma and Pyxis, and he is currently doing an internship at Qualcomm in the custom circuits group. His current research interests include investigating ways to reduce the effects of process variation and low power circuit design.
Debarshi Chatterjee is a graduate student at Stanford University. He received M.S in Electrical Engineering from The University of Tulsa, Oklahoma, USA and B.E in Electronics and Telecommunication Engineering from Jadavpur University, India. His research interests are VLSI Design Automation and Circuit Optimization.
Derek Chiou received his Ph.D., S.M. and S.B. degrees from the Electrical Engineering and Computer Science Department at the Massachusetts Institute of Technology. There he was a member of the Computation Structures Group. He was an architect of the StarT-Voyager machine as well as the StarT-NG
machine. After completing his Ph.D., Dr. Chiou became a system architect at Avici Systems. Prof. Chiou is interested in computer architecture, parallel computer architecture, Internet router architecture and computer engineering.
Minsik Cho received BS in EE from Seoul National Univ. in 1999 and MS in ECE from Univ. of Wisconsin Madison in 2004 respectively. He is currently a third year Ph.D student of ECE dept of Univ. of Texas Austin. He recently won a highly competitive IBM Ph.D. Scholarship for $10K. His main research interest is VLSI Design Automation Algorithm for DFM.
Scott R. Cottier received his B.S. degree in electrical engineering from Texas A&M University, in 2000. He is the technical lead for the Synergistic Processing Element of the CELL Broadband Engine™ at the Sony-Toshiba-IBM Design Center, Austin, TX. His main focus is high speed memory design.
Edward Doan received his BS ECE (2003) and MS ECE (2005) from the University of Texas at Austin. He has been with IBM since 2003 and is currently an Application Engineer for Cell Broadband Engine processors. He is also program manager for the IBM & UT partnership and is an adjunct faculty member in the McCombs School of Business.
Mattan Erez earned his Ph.D. in electrical engineering from Stanford University in 2007. He joined the faculty of The University of Texas at Austin in that same year. He has received several best paper awards at international conferences. Dr. Erez's research focus is computer architecture. Specifically, he is interested in the critical aspects of locality, parallelism and bandwidth constraints to overcome the limitations of today's architectures. One goal is to improve cooperation between the hardware, compiler and programmer in order to enable new levels of performance, efficiency and code-portability.
Justin J. Friesenhahn is currently working on a Ph.D. at the University of
Texas at Austin Laboratory for Computer Architecture under Professor Lizy
John. He has completed a BSEE with highest honors and a MSE in computer
engineering from the University of Texas at Austin. He has industry
experience at Magma, AMD, Spansion, and IBM. He is also an IEEE member.
Gian Gerosa has 25 years of experience in the semiconductor industry since obtaining his PhD in electrical engineering from the Ohio State University (OSU) in 1982. He has a BSEE from the Georgia Institute of Technology (1977) and a MSEE from OSU (1980). His interests are in low power circuit techniques on special circuits such as PLLs, thermal sensors, and IOs. Gian manages the L2 cache and analog design teams in Austin, Texas where the 1st Intel ATOM processor was designed and productized in 45nm CMOS; his team is currently working on 32nm circuits. Gian is an IEEE member.
Ranjit Gharpurey received his Ph.D. from the University of California at Berkeley and his Bachelor of Technology from the Indian Institute of Technology, Kharagpur, India. Dr. Gharpurey's current research is in the area of RF and high-frequency analog design. This includes the design of transceivers and frequency synthesizers used in narrowband and broadband wireless systems. A significant portion of his research is also related to the study of spurious coupling mechanisms through substrates and packages that adversely impact the performance of highly integrated mixed-signal and RF circuits.
Steven A. Guccione received his B.S.E.E. from Boston University, his M.S.E.E. from the University of Minnesota and his Ph.D. degree in Electrical Engineering from the University of Texas at Austin. He is the founder and Chief Scientist of Cmpware, Inc., one of the first companies to create software development tools for multicore processors. Dr. Guccione has previously held engineering and management positions QuickSilver Technology, Xilinx, Texas Instruments, Honeywell, Advanced Micro Devices and has consulted for several smaller companies.
Kanupriya Gulati is a Ph.D. student in the Department of Electrical and
Computer Engineering at Texas A&M University, College Station.
She received her BE degree in Computer Engineering from Delhi
College of Engineering, India in 2003 and her MS degree in Computer
Engineering from Texas A&M University, College Station in 2006. She
has been employed as an intern with several companies including
Cadence Research Laboratories, Intel, Mentor Graphics and Atrenta.
Currently, for her doctoral degree, her research
efforts include various aspects of VLSI design like optimizing logic
synthesis and accelerating CAD algorithms in hardware.
Kanupriya is an IEEE student member.
Rajesh Gupta received a BTech from IIT, Madras in 1985 and a PhD from the University of Southern California, Los Angeles in 1991. He is a Principal Engineer with the Intel Ultra Mobility Group in Austin, TX, working on design automation of high performance and low power microprocessors including the first Intel Atom processor design. Prior to joining Intel he worked with IBM in East Fishkill, NY, developing performance-driven CAD tools for ASIC and microprocessor designs, where he received an Outstanding Innovation Award. His interests include CAD algorithms and medical applications of technology.
Arjang Hassibi received the B.S. degree with honors from the University of Tehran, Iran in 1997 and the M.S. and Ph.D. degrees from Stanford University in 2001 and 2005, respectively, all in electrical engineering. From March 2005 to August 2006, he was a Postdoctoral Scholar at the Department of Electrical Engineering at the California Institute of Technology. Since August 2006 he has been with the Department of Electrical and Computer Engineering of the University of Texas at Austin where he is currently an Assistant Professor. His main research areas are biosensors and bioelectronics, integrated sensors, DNA and protein integrated microarrays, biomedical VLSI systems, biological assay modeling, noise spectroscopy, and molecular diagnostics.
Shahid Imam is currently working for Qualcomm's DSP core design group located in Austin. He has over 12 years experience in processor design working for a wide range of companies: Texas instruments, Micron, StarCore DSP and Qualcomm. He has MS degree from Arizona State University.
Eun Jung Jang is a Ph.D. student in the Department of Electrical and Computer Engineering at the University of Texas at Austin.
She received her B.S. and M.S. degree from Ewha Women's University, Korea in 2001 and 2003, respectively.
Her research interest lies in VLSI design and VLSI testing.
Lizy John received her Ph.D. in computer engineering from The Pennsylvania State
University in 1993. She joined The University of Texas Austin faculty in fall
1996, and is an Engineering Foundation Centennial Teaching fellow and a National Science Foundation CAREER award winner. Dr. John's current research interests include high performance processors such
as superscalar and superpipelined processors, high performance memory systems
and caches, low-power design, compiler optimization techniques, program behavior
studies, workload characterization, reconfigurable computer architectures, rapid
prototyping etc.
Jebediah Keefe received his BSE in Computer Engineering from the University of Michigan in 2001.
He is currently pursuing his MSE in Computer Engineering at the University of Texas at Austin.
Jebediah is interested in full-system cycle-accurate simulation, reconfigurable architectures, and introspective systems.
Sunil P Khatri received his B.Tech (EE) degree from IIT Kanpur, his
M.S.(ECE) degree from the University of Texas, Austin, and the
Ph.D. in EECS from the University of California, Berkeley. Sunil is currently an Assistant Professor in ECE at Texas A&M
University. His research interests include
novel VLSI design approaches to address issues such as power,
cross-talk, and radiation tolerance, logic synthesis as well as
cross-disciplinary
applications of these topics. He has coauthored about 120 technical
publicatons, 5 United States Patent awards, one book and a book
chapter. His work has received two best paper awards, and two best
paper nominations. Sunil's research is supported by Intel
Corporation, Nascentric Inc,, Lawrence Livermore National
Laboratories and the National Science Foundation.
Andreas Kuehlmann received the Dipl-Ing. degree and the Dr.-Ing. habil degree in Electrical Engineering from the University of Technology at Ilmenau, Germany. He was the principal author and project leader of Verity, IBM's standard equivalence checking tool. In July 2000 he joined the Cadence Research Laboratories where he continues to work on synthesis and verification problems. Since July 2002, he is also adjunct professor at the University of California at Berkeley. In 2003 Andreas was awarded IEEE Fellow. In August 2003 Andreas became the Director of Cadence Laboratories. Since 2008 Andreas has served as President Elect of the IEEE Council on EDA (CEDA).
Ka Leung serves as director of engineering for Silicon Laboratories’ wireline products. From 2005 to 2007, he was a director of engineering at Silicon Laboratories in the Microcontroller division. Mr. Leung joined the company with the acquisition of Cygnal Integrated Products in 2003. Previously, he served as design manager at Burr-Brown and Crystal Semiconductor. Mr. Leung holds 43 patents in data converter and analog mixed-signal processing and has published ten journal and conference papers including two for the International Solid-State Circuit Conference. Mr. Leung received bachelor’s degree and master’s degree in electrical engineering from the University of Arizona.
Theodore W. Manikas is an Assistant Professor of Electrical Engineering at The University of Tulsa, and is also the Co-Director of the Institute of Nanotechnology. He received the B.S. in electrical engineering from Michigan State University, M.S. from Washington University (St. Louis), and the Ph.D. from the University of Pittsburgh. His research interests include design automation for VLSI and nanotechnology circuits. He is a registered Professional Engineer in Oklahoma.
Igor Markov is an associate professor of Electrical Engineering and Computer Science at the University of Michigan. He received his Ph.D. in Computer Science from UCLA. Currently he is a member of the Executive Board of ACM SIGDA, Editorial Board member of ACM TODAES, IEEE Transactions on Computers and IEEE Transactions on CAD. Prof. Markov has co-authored more than 140 refereed publications, some of which were honored by the best-paper award at the Design Automation and Test in Europe Conference (DATE) and the IEEE CAS Donald O. Pederson award for best paper in IEEE Transactions on Computer-Aided Design. Prof. Markov is the recipient of a DAC Fellowship, an ACM SIGDA Outstanding New Faculty award, an NSF CAREER award, and an IBM Partnership Award.
Mark McDermott is currently a Research Fellow and Adjunct Faculty in ECE Department at the University of Texas where he teaches graduate level courses in VLSI design, System-on-Chip design and technical entrepreneurship. Prior to his current assignment he was the VP of Engineering at Coherent Logix. CEO of DynaFlow Computing, Inc., VP Engineering and co-founder of Somerset Embedded Technologies, Inc., VP Engineering and co-founder of VisionFlow, Inc., General Manager of the Texas Development Center for Intel Corporation, Director of the PowerPC Somerset Design Center and Director of the Austin Design Center for Cyrix, Inc.
Bassam Mohd received a BS in Computer Engineering from the KFUPM of Dhahran-KSA and a MS in Computer Engineering from University of Louisiana at Lafayette. He worked for several semiconductor companies including Intel, SUN and Synopsys. He is currently working for Qualcomm's Austin DSP group. His experience spans circuit design, verification and power analysis. He is also a part-time Ph.D. student in the ECE department at UT. His interests include DSP designs and power reduction/estimation techniques.
Sani R. Nassif received his PhD from Carnegie-Mellon University in the eighties. He worked for ten years at Bell Laboratories on various aspects of design and technology coupling including device modeling, parameter extraction, worst case analysis, design optimization and circuit simulation. He joined the IBM Austin Research Laboratory in January 1996 where he is presently managing the tools and technology department, which is focused on design/technology coupling and includes activities in: model to hardware matching, simulation and modeling, physical design, statistical modeling, statistical technology characterization and similar areas.
Michael Orshansky received his Ph.D. from UC Berkeley, where he was a member of the Semiconductor Device Group, in 2001. His undergraduate degree is also from UC Berkeley where he studied electrical engineering and computer science and philosophy. Prior to joining the UT faculty in 2003, he has been a Visiting Research Scientist at the Gigascale Silicon Research Center and a Lecturer at the Department of Electrical Engineering at Berkeley. Dr. Orshansky has won a NSF CAREER Award and the Best Paper Award at the 2005 Design Automation Conference.
David Z. Pan received his Ph.D. in Computer Science from UCLA in 2000. Prior to joining the UT faculty in 2003, he was a Research Staff Member at IBM T. J. Watson Research Center. His research interests include physical synthesis, design for manufacturability, and design/automation for emerging technologies. He is an Associate Editor for IEEE Transactions on Computer Aided Design and IEEE Transactions on Circuits and Systems-II, and the Program Committee Chair for International Symposium on Physical Design 2007. Dr. Pan has received many awards for his research contributions, including ACM/SIGDA Outstanding New Faculty Award, SRC Inventor Recognition Award, and IBM Faculty Award.
Arvindh Rajasekaran received his bachelor's degree in Electronics and Communication from The Visvesvaraya Technological University, Karnataka, India in 2002. He is currently a Master's student in the EE department at The University of Texas at Dallas. Prior to his Master's, he has worked in the Aerospace division of Honeywell for Avionics test and reliability analysis. His research interests include Energy Harvesting and Low power wireless applications.
Jaime Ramírez-Angulo is Klipsch Distinguished Professor, IEEE Fellow, and Director of the Mixed-Signal VLSI lab at the Klipsch School of Electrical and Computer Engineering, New Mexico State University in Las Cruces, New Mexico, USA. His research is related to various aspects of design and test of analog and mixed-signal Very Large Scale Integrated Circuits. He has made numerous contributions to this field which have been reported in over four hundred publications.
Martin Saint-Laurent received the B.Eng. degree (with honors) in electrical engineering from McGill University, Montréal, Canada, and the M.S. and Ph.D. degrees, also in electrical engineering, from the Georgia Institute of Technology, Atlanta, GA, USA. From 1998 to 2005, he was with Intel Corp., where he worked on two generations of high-frequency IA-32 processors as a custom circuit designer. His responsibilities included clock distribution and sequential element design. In 2005, he joined Qualcomm Inc., Austin, TX, USA, where he currently works on low-power circuits for wireless applications. His technical interests include: signal integrity, circuit design and optimization, low-power design techniques, and interconnects. He is the author of several technical papers and patents.
Edgar Sánchez-Sinencio received the degree in communications and electronic engineering from the National Polytechnic Institute of Mexico, Mexico City, the M.S.E.E. degree from Stanford University, CA, and the Ph.D. degree from the University of Illinois at Champaign-Urbana. He is currently the TI J Kilby Chair Professor and Director of the Analog and Mixed-Signal Center at Texas A&M University. He has published about 150 journal papers and 250 conference papers, he has more than 1200 citations in the Scientific Citation Index. His present interests are in the area of Medical Electronics, RF-Communication circuits and low voltage analog and mixed-mode circuit design. He is an IEEE Fellow Member since 1992.
Mike Seningen is a Circuit Design Manager, a Principal Technologist and a Founder of Intrinsity. Mike is a key contributor to the definition and development of Intrinsity's Fast-14TM high speed design methodology, for which he has been granted 19 patents. Prior to Intrinsity, he designed high speed circuits and caches on numerous Sparc processors while at Ross Technology. Mike received his BSEE from Virginia Tech in 1988 prior to joining the 68040 group at Motorola designing high speed datapath elements. Mike is the Chair of the Solid State Circuits & Circuits and Systems Societies for the Central Texas Section of the IEEE, and is a member of the Technical Program Committee for the CICC. Mike thrives on the challenges inherent to automating robust high speed logic and low power designs.
Shanhu Shen got her bachelor's degree in information science and electronic engineering in 2004 from Zhejiang University, China, and she's now a Ph.D. candidate in VLSI Institute of Zhejiang University. Her research interests include compact OPC model building and calibration, OPC algorithm development, advanced RET method like model based SRAF insertion and inverse mask synthesis. She's now studying and doing research at the University of Texas at Austin, prior to that she was developing ZOPC software in Zhejiang University.
Crystal Soja received her bachelor's degree in Electrical and Computer Engineering from Cornell University, Ithaca, NY in 2001. She is currently an Application Engineer for Cell Broadband Engine processors at IBM in Austin. From 2001 to 2004, she was a Functional Characterization Engineer for PowerPC processors at IBM in Burlington, Vermont.
Mike Spear received a B.S. in computer engineering from Purdue University in 2001. He is currently a student at the University of Texas at Austin and will be graduating with a Masters in Computer Engineering this Spring. His current focus is high-speed I/O design. He has been an I/O logic designer at IBM since 2001, working on pSeries and zSeries systems.
Earl E Swartzlander, Jr. joined the UT-Austin faculty in 1990. His research interests include the technology, architecture and development of special purpose processors. Related interests include computer arithmetic and systolic arrays architecture. He is an IEEE Fellow, a registered professional engineer, the recipient of Purdue University's Outstanding Electrical Engineer and Distinguished Engineering Alumnus Awards, the recipient of Distinguished Engineering Alumnus Award from the University of Colorado, and the recipient of a Third Millennium Medal from the IEEE Solid-State Circuit Society.
Axel Thomsen attended the Polytechnical University of Braunschweig, Germany. He received his Ph. D. in Electrical Engineering in the area of analog IC design from Georgia Institute of Technology. From 1993 to 1995 he was Assistant Professor at the University of Alabama in Huntsville. From 1995 to 2001 he was a design engineer and manager at Cirrus Logic in Austin where he worked on high resolution dataacquisition ICs, ADCs, DACs and amplifiers.
He is currently a principal engineer and design manager at Silicon Laboratories, where he has worked on low jitter timing circuits, PLLs, and Power ICs. Occasionally he teaches analog IC design at UT Austin. He holds 35 patents and has published 20 papers.
TR Viswanathan spent 15 years managing research and development, product design, and manufacturing at Texas Instruments and AT&T Bell Labs. Prior to that, Dr. Viswanathan spent 20 years in teaching, research, and academic administration. He received the IEEE CAS Darlington Award, the IEEE Third Millennium Medal, and the Jack Kilby Award. Dr. Viswanathan has co-authored over 45 journal papers, one textbook and 23 U.S. Patents. Dr. Viswanathan holds a B.Sc in Physics from the University of Madras and graduated in Electrical Communications Engineering from the Indian Institute of Science, Bangalore. He received an M.Sc. and a Ph.D. degree in Electrical Engineering from the University of Saskatchewan, Canada.
Duncan M. Hank Walker is professor and graduate advisor of computer science at Texas A&M University. Previously he was research faculty at Carnegie Mellon University. He has also worked for Hughes Aircraft, Digital Equipment and IBM. He graduated from Caltech and Carnegie Mellon. His research interests are in integrated circuit test and diagnosis.
Xin Wang obtained BS in Physics from Peking Univ., China in 1994, MSE in EE from Univ. of Michigan, Ann Arbor in 1996 and is graduating with his PhD in ECE from Univ. of Texas at Austin in May 2008. He has been working on analog/RF IC designs (mainly CMOS) since 1997 for various companies including TI, Broadcom, Skyworks, Beceem, and currently as an IC design manager at Maxlinear Inc.
Zheng Wang received B.S. & M.S. in EE from Zhejiang University, China in 2001 and in 2004 respectively. He is currently a second year Ph.D student of CS dept at Texas A&M University. He was an IC design engineer at NXP from 2004 to 2006. His current research interests are VLSI testing and Automatic Test Pattern Generation(ATPG).
Tung-Yeh Wu is a PhD student in the Computer Engineering Research Center at the University of Texas at Austin. He received Bachelor's degree in Electrical Engineering from the National Chung Cheng University, Taiwan, in 2002. His M.S. degree, in Electrical and Computer Engineering, was received from the University of Texas at Austin in 2006. His research interest includes high speed digital circuit design, VLSI testing and IR drop analysis.
Peng Yu received BS in physics from Peking University (People's Republic of China) in 2002 and MS in physics from the University of California San Diego in 2004. He is currently a PhD candidate in the Department of Electrical and Computer Engineering at the University of Texas at Austin. He recently received a BACUS Photomask Scholarship. He is interested in OPC algorithms, lithography modeling and Design for Manufacturability (DFM).
Bin Zhang received his MSEE from the University of Texas at Austin in 2001. He is currently working toward his PhD degree at the same University. His research area is IC design for reliability. He received the ISQED Best paper award in 2006 and the IBM research award, for “the best paper & presentation at the Graduate and Industry Networking Conference at University of Texas in 2008, in Material Science and Nano, Micro, Bio & MEMS Engineering”